dc.contributor.author | Rai, Narendra | |
dc.contributor.author | Sarkar, Ritam | |
dc.contributor.author | Mahajan, Ashutosh | |
dc.contributor.author | Laha, Apurba | |
dc.contributor.author | Saha, Dipankar | |
dc.contributor.author | Ganguly, Swaroop | |
dc.date.accessioned | 2024-03-28T08:46:51Z | |
dc.date.available | 2024-01-13T17:48:02Z | |
dc.date.available | 2024-03-28T08:46:51Z | |
dc.date.issued | 2023 | |
dc.identifier.issn | 0021-8979 | |
dc.identifier.other | WOS:001135920300003 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/43412.2 | |
dc.source | WOS | |
dc.title | Analysis and modeling of reverse-biased gate leakage current in AlGaN/GaN high electron mobility transistors | |
dc.type | Journal article | |
dc.contributor.imecauthor | Sarkar, Ritam | |
dc.contributor.orcidimec | Sarkar, Ritam::0000-0001-7753-4658 | |
dc.identifier.doi | 10.1063/5.0176944 | |
dc.source.numberofpages | 12 | |
dc.source.peerreview | yes | |
dc.source.beginpage | Art. 244503 | |
dc.source.endpage | N/A | |
dc.source.journal | JOURNAL OF APPLIED PHYSICS | |
dc.source.issue | 24 | |
dc.source.volume | 134 | |
imec.availability | Published - imec | |
dc.description.wosFundingText | This work was supported by the Ministry of Electronics and Information Technology (MeitY) and the Department of Science and Technology (DST), Government of India, through the Nanoelectronics Network for Research and Applications (NNetRA) as well as through the Science & Engineering Research Board (SERB). N.R. acknowledges support through the Visvesvaraya Ph.D. Scheme from MeitY. | |