Mask absorber, mask tone, and wafer process impact on resist line-edge-roughness

Abstract

A high-numerical-aperture (NA) extreme ultraviolet lithography (EUVL) system has been highly desired and is now under construction at imec-ASML High NA Laboratory in Veldhoven. However, there are still many challenges to realizing high-volume manufacturing by High NA EUVL. Line edge roughness (LER) mitigation is one of the key elements. In our previous research, we studied how the normalized image log slope (NILS) and resist film thickness affect resist LER by exposure at NA 0.33 on NXE:3400 and S-Litho EUV. However, the mask absorber, mask tone, exposure dose, and postexposure bake (PEB) temperature were not the subject of previous investigations for decreasing LER. They have the potential to mitigate resist roughness such as illumination and resist thickness studied previously. Unbiased LER values of metal oxide resists (MOR) were experimentally measured on a half-pitch (hp) 14 nm line and space under several mask absorber/tonality, dose, and PEB temperature values. Per the mask absorber/tone, the NILS was varied using different illumination shapes. Low-n masks exhibited a higher NILS for the same illumination shape, which resulted in lower resist LER on the wafer. It was also found that the mask tone can contribute to LER mitigation. According to detailed investigations about the mask roughness, mask error enhancement factor, and flare by critical dimension scanning electron microscope (CD-SEM) measurements and S-Litho EUV, the most likely reason for the LER difference is a flare increase given by mask tone changes. From the dose and PEB temperature variation study, dose was apparently more dominant in resisting roughness than PEB temperature.