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Analysis of leakage currents and impact on off-state power consumption for CMOS technology in the 100-nm regime

dc.contributor.authorHenson, Kirklen
dc.contributor.authorYang, N.
dc.contributor.authorKubicek, Stefan
dc.contributor.authorVogel, E. M.
dc.contributor.authorWortman, J.
dc.contributor.authorDe Meyer, Kristin
dc.contributor.authorNaem, Abdalla
dc.date.accessioned2021-10-14T13:03:36Z
dc.date.available2021-10-14T13:03:36Z
dc.date.issued2000
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/4425
dc.sourceIIOimport
dc.titleAnalysis of leakage currents and impact on off-state power consumption for CMOS technology in the 100-nm regime
dc.typeJournal article
dc.contributor.imecauthorKubicek, Stefan
dc.contributor.imecauthorDe Meyer, Kristin
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage1393
dc.source.endpage1400
dc.source.journalIEEE Trans. Electron Devices
dc.source.issue7
dc.source.volume47
imec.availabilityPublished - open access


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