Cold CMOS for Sustainable Datacenters

Abstract

Net benefits of cold CMOS including the refrigeration penalty are investigated for datacenters. It is found that cold CMOS is best used in the iso-speed (energy efficiency) scenario at moderately low temperatures above -50 degrees C. Total energy reduction at iso-speed is -30% with LCO2 (-50 degrees C) and -10% with LN2 (77 K, -196 degrees C) for 40% of Carnot cooling efficiency. The optimal die temperature is around -20 degrees C. Highspeed scenario (same compute power) is less interesting because total energy increases more rapidly than delay reduces (2 X for -20% at -50 degrees C) and heat transfer is limited for LN2 (<30 W/cm(2)). Overall, LCO2 CMOS at iso-speed (V-DD approximate to 0.6 V) can improve datacenter sustainability in terms of energy efficiency, power density, and environmental impact. Power density in emerging 3D stacked CMOS architectures can be reduced even if total-energy savings shrink to -0%. LCO2 is a welcome replacement for the fluorinated coolants being phased-out due to their high global warming potential of 25.000 CO2-equivalent, and LCO2 batteries can store the fluctuating green energy while preserving rare-earth metal deposits and promoting geopolitical independence. To obtain more than -30% theoretical total energy reduction with voltage-scaled classical CMOS, further advances are required in cooling efficiency (>40%) and/or (transistor) compute-power reduction (V-DD < 0.6 V). Further V-DD-scaling at iso-speed is hampered by the requirement to beat Boltzmann's thermal limit. This could open up a new field of research on super-steep-slope devices achieving sub-thermionic behavior at moderately low temperatures instead of at room temperature.