Pattern selection strategy by clustering for logic EPE monitoring

Abstract

Measuring EPE on logic devices is challenging due to the large variety of features given its random environment and layout. One has to measure an enormous amount of unique features to estimate CD, PPE, LCDU, and LPE of each feature making it impractical for EPE monitoring due to the large metrology load. We developed a simulation-based pattern clustering method that identifies and classifies features with similar EPE behavior to address this challenge. Both geometric design and imaging behavior of the patterns were taken into account to effectively cluster similar features. We report here the verification results of the clustering method which is measured on-wafer for both random layout lines-spaces and vias. With this we make a step towards identification and selection of EPE critical patterns for logic devices, which can be used further for monitoring and control.