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Practicalities and limitations of scanning capacitance microscopy for routine integrated circuit characterization

dc.contributor.authorStephenson, Robert
dc.contributor.authorDe Wolf, Peter
dc.contributor.authorTrenkler, Thomas
dc.contributor.authorHantschel, Thomas
dc.contributor.authorClarysse, Trudo
dc.contributor.authorJansen, Philippe
dc.contributor.authorVandervorst, Wilfried
dc.date.accessioned2021-10-14T13:50:52Z
dc.date.available2021-10-14T13:50:52Z
dc.date.issued2000
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/4771
dc.sourceIIOimport
dc.titlePracticalities and limitations of scanning capacitance microscopy for routine integrated circuit characterization
dc.typeJournal article
dc.contributor.imecauthorHantschel, Thomas
dc.contributor.imecauthorVandervorst, Wilfried
dc.contributor.orcidimecHantschel, Thomas::0000-0001-9476-4084
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage555
dc.source.endpage559
dc.source.journalJ. Vacuum Science and Technology B
dc.source.issue1
dc.source.volumeB18
imec.availabilityPublished - open access
imec.internalnotesPaper from the 5th International Workshop on the Measurement and Characterization of Ultra-Shallow Doping Profiles; 1999


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