Now showing items 1-3 of 3

    • Degradation Mapping and Impact of Device Dimension on IGZO TFTs BTI 

      Rinaudo, Pietro; Vaisman Chasin, Adrian; Franco, Jacopo; Wu, Zhicheng; Subhechha, Subhali; Arutchelvan, Goutham; Eneman, Geert; Yengula Venkata Ramana, Bhuvaneshwari; Rassoul, Nouredine; Delhougne, Romain; Kaczer, Ben; De Wolf, Ingrid; Kar, Gouri Sankar (2023)
    • NPN SiGe Hetero Junction Transistor Latch-Up Memory Selector 

      Hiblot, Gaspard; Ravsher, Taras; Loo, Roger; Yengula Venkata Ramana, Bhuvaneshwari; Canvel, Yann; Franchina Vergel, Nathali; Fantini, Andrea; Houshmand Sharifi, Shamin; Bazzazian, Nina; Ayyad, Mustafa; Merkulov, Alex; Kar, Gouri Sankar; Couet, Sebastien (2023-02-03)
    • The Impact of IGZO Channel Composition on DRAM Transistor Performance 

      Kruv, Anastasiia; van Setten, Michiel; Dekkers, Harold; Lorant, Christophe; Verreck, Devin; Smets, Quentin; Yengula Venkata Ramana, Bhuvaneshwari; Belmonte, Attilio; Subhechha, Subhali; Vaisman Chasin, Adrian; Delhougne, Romain; Kar, Gouri Sankar (2023)