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dc.contributor.authorDe Vos, Alexis
dc.contributor.authorDesoete, B.
dc.contributor.authorJaniak, F.
dc.contributor.authorNogawski, A.
dc.date.accessioned2021-10-14T16:47:48Z
dc.date.available2021-10-14T16:47:48Z
dc.date.issued2001
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/5215
dc.sourceIIOimport
dc.titleControl gates as building blocks for reversible computers
dc.typeProceedings paper
dc.source.peerreviewno
dc.source.beginpage9201
dc.source.endpage9210
dc.source.conferenceProceedings of the 11 th international workshop on Power and Timing Modeling, Optimization and Simulation; September 2001; Yver
dc.source.conferencelocation
imec.availabilityPublished - imec


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