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The stud grid array, a low cost solution for packaging and assembling high pin count devices

dc.contributor.authorBeyne, Eric
dc.contributor.authorChristiaens, Filip
dc.contributor.authorRoggen, Jean
dc.contributor.authorVan Puymbroeck, Jan
dc.contributor.authorDumoulin, A.
dc.contributor.authorBoone, L.
dc.contributor.authorHeerman, M.
dc.date.accessioned2021-09-29T13:04:14Z
dc.date.available2021-09-29T13:04:14Z
dc.date.issued1995
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/521
dc.sourceIIOimport
dc.titleThe stud grid array, a low cost solution for packaging and assembling high pin count devices
dc.typeProceedings paper
dc.contributor.imecauthorBeyne, Eric
dc.contributor.imecauthorVan Puymbroeck, Jan
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage70
dc.source.endpage72
dc.source.conferenceVLSI Packaging Workshop: Spotlight BGA
dc.source.conferencedate16/10/1995
dc.source.conferencelocationMonterey, CA USA
imec.availabilityPublished - open access
imec.internalnotes


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