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Defect generation in ultra-thin SiO2 gate layers and SiO2/ZrO2 gate stacks and the dispersive transport model

dc.contributor.authorHoussa, Michel
dc.contributor.authorAfanas'ev, V. V.
dc.contributor.authorStesmans, Andre
dc.contributor.authorHeyns, Marc
dc.date.accessioned2021-10-14T17:02:47Z
dc.date.available2021-10-14T17:02:47Z
dc.date.issued2001
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/5348
dc.sourceIIOimport
dc.titleDefect generation in ultra-thin SiO2 gate layers and SiO2/ZrO2 gate stacks and the dispersive transport model
dc.typeJournal article
dc.contributor.imecauthorHoussa, Michel
dc.contributor.imecauthorStesmans, Andre
dc.contributor.imecauthorHeyns, Marc
dc.contributor.orcidimecHoussa, Michel::0000-0003-1844-3515
dc.source.peerreviewno
dc.source.beginpage367
dc.source.endpage372
dc.source.journalMicroelectronic Engineering
dc.source.issue1_4
dc.source.volume59
imec.availabilityPublished - imec
imec.internalnotes12th INFOS Conference - Insulating Films on Semiconductors; June 2001; Udine, Italy


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