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Memory power reduction for the high-speed implementation of turbo codes

dc.contributor.authorMaessen, Francien
dc.contributor.authorGiulietti, Alexandre
dc.contributor.authorBougard, Bruno
dc.contributor.authorVan der Perre, Liesbet
dc.contributor.authorCatthoor, Francky
dc.contributor.authorEngels, Marc
dc.date.accessioned2021-10-14T17:18:42Z
dc.date.available2021-10-14T17:18:42Z
dc.date.issued2001
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/5465
dc.sourceIIOimport
dc.titleMemory power reduction for the high-speed implementation of turbo codes
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewno
dc.source.beginpage16
dc.source.endpage24
dc.source.conferenceProceedings IEEE Workshop on Signal Processing Systems (SIPS) Design and Implementation; September 2001; Antwerpen, Belgium.
dc.source.conferencelocation
imec.availabilityPublished - imec


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