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Ultra-thin film fully-depleted SOI CMOS with raised G/S/D device architecture for sub-100 nm applications

dc.contributor.authorvan Meer, H.
dc.contributor.authorDe Meyer, Kristin
dc.date.accessioned2021-10-14T18:06:16Z
dc.date.available2021-10-14T18:06:16Z
dc.date.issued2001
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/5745
dc.sourceIIOimport
dc.titleUltra-thin film fully-depleted SOI CMOS with raised G/S/D device architecture for sub-100 nm applications
dc.typeProceedings paper
dc.contributor.imecauthorDe Meyer, Kristin
dc.source.peerreviewno
dc.source.beginpage45
dc.source.endpage46
dc.source.conferenceProceedings 2001 IEEE International SOI Conference
dc.source.conferencedate1/10/2001
dc.source.conferencelocationDurnago, CO USA
imec.availabilityPublished - imec


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