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Behaviour of Poly-Si1-XGex-gated MOS capacitors under different electrical stress conditions in the direct tunnelling regime

dc.contributor.authorYousif, M. Y. A.
dc.contributor.authorWillander, M.
dc.contributor.authorLundgren, P.
dc.contributor.authorCaymax, Matty
dc.date.accessioned2021-10-14T18:30:26Z
dc.date.available2021-10-14T18:30:26Z
dc.date.issued2001
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/5866
dc.sourceIIOimport
dc.titleBehaviour of Poly-Si1-XGex-gated MOS capacitors under different electrical stress conditions in the direct tunnelling regime
dc.typeJournal article
dc.contributor.imecauthorCaymax, Matty
dc.source.peerreviewno
dc.source.beginpage478
dc.source.endpage482
dc.source.journalSemiconductor Science and Technology
dc.source.issue6
dc.source.volume16
imec.availabilityPublished - imec


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