A detailed, cell-by-cell look into the effects of aging on an SRAM PUF using a specialized test array

Abstract

The use of SRAM power-up values is the foundation of one of the most common Physical Unclonable Functions (PUFs) implementations, providing a Root-of-Trust for cryptographic applications at a low cost. PUFs are required to return the same response each time it is requested. However, SRAM power-ups by themselves are not reliable enough for the demanding PUF applications. This problem is solved by a variety of techniques that rely on an expected baseline reliability, extracted from tests performed under process, voltage and temperature variations. Nevertheless, aging effects, specifically Bias Temperature Instability (BTI), can have a significant impact that may not conform to the said baseline and are often ignored or overlooked due to the difficulty in properly characterizing and modeling them. In this work, we employ our custom chip specifically made to facilitate the characterization of aging through stress, i.e., applying a supply voltage larger than the nominal voltage to accelerate the impact of BTI and thus provide a more detailed look into the behavior of aging in an SRAM PUF array.