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Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits

dc.contributor.authorBadaroglu, Mustafa
dc.contributor.authorVan Heijningen, Marc
dc.contributor.authorGravot, Vincent
dc.contributor.authorCompiet, John
dc.contributor.authorDonnay, Stephane
dc.contributor.authorEngels, Marc
dc.contributor.authorGielen, Georges
dc.contributor.authorDe Man, Hugo
dc.date.accessioned2021-10-14T21:07:41Z
dc.date.available2021-10-14T21:07:41Z
dc.date.issued2002
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/5977
dc.sourceIIOimport
dc.titleMethodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits
dc.typeProceedings paper
dc.contributor.imecauthorBadaroglu, Mustafa
dc.contributor.imecauthorDonnay, Stephane
dc.contributor.imecauthorGielen, Georges
dc.contributor.imecauthorDe Man, Hugo
dc.contributor.orcidimecDonnay, Stephane::0000-0003-2489-4793
dc.source.peerreviewno
dc.source.beginpage274, 466
dc.source.conferenceIEEE International Solid-State Circuits Conference. Digest of Technical Papers - ISSCC
dc.source.conferencedate3/02/2002
dc.source.conferencelocationSan Francisco, CA USA
imec.availabilityPublished - imec


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