Anomalous punch-through current behavior in GaN due to trap-assisted space charge limited conduction triggered by threading dislocations with an edge component

Abstract

In different architectures of GaN power devices, such as in vertical MOSFETs, where a p-type layer is present in between n-type layers or contacts, punch-through is one important aspect that limits high voltage operation. This is especially critical in architectures with a buried pGaN layer due to the difficulty in obtaining high acceptor concentrations. In this letter, it is shown that trap-assisted Space Charge Limited Conduction (SCLC) can cause anomalous current behavior and delayed device breakdown due to charge trapping in deep acceptor states where immediate destructive failure due to punch-through would otherwise be seen. While trap-assisted SCLC has been identified in vertical GaN p/n diodes before, no insight has been given so far on the nature of the deep trap states responsible for such behavior. Through electrical characterization and numerical simulations, it is shown that the most plausible physical origin for such deep acceptors are threading dislocations with an edge component, possibly with a 5/7 atom ring core structure. Moreover, it is demonstrated here that large charge screening around dislocations that arises from the low doping levels in such structures may compromise most or all of the active area, allowing electron capture by what would be otherwise highly localized trap states at the dislocation core.