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Demonstration of an 4.2 K analog switch matrix in a standard 0.7μm CMOS process

dc.contributor.authorCreten, Ybe
dc.contributor.authorDe Hert, J.
dc.contributor.authorCharlier, O.
dc.contributor.authorMerken, Patrick
dc.contributor.authorPutzeys, Jan
dc.contributor.authorVan Hoof, Chris
dc.date.accessioned2021-10-14T21:18:05Z
dc.date.available2021-10-14T21:18:05Z
dc.date.issued2002
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/6154
dc.sourceIIOimport
dc.titleDemonstration of an 4.2 K analog switch matrix in a standard 0.7μm CMOS process
dc.typeProceedings paper
dc.contributor.imecauthorPutzeys, Jan
dc.contributor.imecauthorVan Hoof, Chris
dc.contributor.orcidimecPutzeys, Jan::0000-0001-8834-5852
dc.contributor.orcidimecVan Hoof, Chris::0000-0002-4645-3326
dc.source.peerreviewno
dc.source.beginpage211
dc.source.endpage213
dc.source.conferenceWOLTE 5 - Proceedings of the 5th European Workshop on Low Temperature Electronics
dc.source.conferencedate19/06/2002
dc.source.conferencelocationGrenoble France
imec.availabilityPublished - imec
imec.internalnotesJournal de Physique IV; 12, Pr3


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