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Parasitic conduction in a 0.13 μm CMOS technology at low temperature

dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorRafi, Joan Marc
dc.contributor.authorSimoen, Eddy
dc.contributor.authorAugendre, Emmanuel
dc.contributor.authorClaeys, Cor
dc.date.accessioned2021-10-14T22:22:32Z
dc.date.available2021-10-14T22:22:32Z
dc.date.issued2002
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/6594
dc.sourceIIOimport
dc.titleParasitic conduction in a 0.13 μm CMOS technology at low temperature
dc.typeProceedings paper
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.source.peerreviewno
dc.source.beginpage61
dc.source.endpage64
dc.source.conferenceWOLTE 5 - Proceedings of the 5th European Workshop on Low Temperature Electronics
dc.source.conferencedate19/06/2002
dc.source.conferencelocationGrenoble France
imec.availabilityPublished - imec
imec.internalnotesJournal de Physique IV; 12, Pr3


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