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Is it possible to Achieve a Teraflop/ s on a chip? From high performance algorithms to architectures.

dc.contributor.authorCatthoor, Francky
dc.date.accessioned2021-09-29T12:40:01Z
dc.date.available2021-09-29T12:40:01Z
dc.date.issued1994
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/67
dc.sourceIIOimport
dc.titleIs it possible to Achieve a Teraflop/ s on a chip? From high performance algorithms to architectures.
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage129
dc.source.endpage130
dc.source.conferenceInternational Symposium on Circuits and Systems : Forum on High Performance Algorithm to Arch
dc.source.conferencedate30/05/1994
dc.source.conferencelocationLondon UK
imec.availabilityPublished - open access


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