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Simple and efficient approach for shunt admittance parameters calculations of VLSI on-chip interconnects on semiconducting substrate

dc.contributor.authorYmeri, Hasan
dc.contributor.authorNauwelaers, Bart
dc.contributor.authorMaex, Karen
dc.contributor.authorDe Roest, David
dc.contributor.authorStucchi, Michele
dc.contributor.authorVandenberghe, S.
dc.date.accessioned2021-10-15T00:09:08Z
dc.date.available2021-10-15T00:09:08Z
dc.date.issued2002
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7084
dc.sourceIIOimport
dc.titleSimple and efficient approach for shunt admittance parameters calculations of VLSI on-chip interconnects on semiconducting substrate
dc.typeProceedings paper
dc.contributor.imecauthorNauwelaers, Bart
dc.contributor.imecauthorMaex, Karen
dc.contributor.imecauthorDe Roest, David
dc.contributor.imecauthorStucchi, Michele
dc.source.peerreviewno
dc.source.beginpage1113
dc.source.conferenceDATE 02. Design Automation and Test in Europe Conference and Exhibition. Proceedings
dc.source.conferencedate4/03/2002
dc.source.conferencelocationParis France
imec.availabilityPublished - imec


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