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Low power coarse-grained reconfigurable instruction set processor

dc.contributor.authorBarat, F.
dc.contributor.authorJayapala, M.
dc.contributor.authorVander Aa, Tom
dc.contributor.authorLauwereins, Rudy
dc.contributor.authorDeconinck, G.
dc.contributor.authorCorporaal, Henk
dc.date.accessioned2021-10-15T03:59:54Z
dc.date.available2021-10-15T03:59:54Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7177
dc.sourceIIOimport
dc.titleLow power coarse-grained reconfigurable instruction set processor
dc.typeProceedings paper
dc.contributor.imecauthorVander Aa, Tom
dc.contributor.imecauthorLauwereins, Rudy
dc.contributor.orcidimecVander Aa, Tom::0000-0002-1504-5266
dc.contributor.orcidimecLauwereins, Rudy::0000-0002-3861-0168
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage230
dc.source.endpage239
dc.source.conferenceField-Programmable Logic and Applications
dc.source.conferencedate1/09/2003
dc.source.conferencelocationLisboa Portugal
imec.availabilityPublished - open access
imec.internalnotesLecture Notes in Computer Science; Vol. 2778


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