Show simple item record

Low power coarse-grained reconfigurable instruction set processor

dc.contributor.authorBarat, Francisco
dc.contributor.authorJayapala, Murali
dc.contributor.authorVander Aa, Tom
dc.contributor.authorDeconinck, Geert
dc.contributor.authorLauwereins, Rudy
dc.contributor.authorCorporaal, Henk
dc.date.accessioned2021-10-15T03:59:57Z
dc.date.available2021-10-15T03:59:57Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7178
dc.sourceIIOimport
dc.titleLow power coarse-grained reconfigurable instruction set processor
dc.typeProceedings paper
dc.contributor.imecauthorJayapala, Murali
dc.contributor.imecauthorVander Aa, Tom
dc.contributor.imecauthorLauwereins, Rudy
dc.contributor.orcidimecJayapala, Murali::0000-0001-7917-0149
dc.contributor.orcidimecVander Aa, Tom::0000-0002-1504-5266
dc.contributor.orcidimecLauwereins, Rudy::0000-0002-3861-0168
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage29
dc.source.endpage31
dc.source.conferenceProgram Acceleration through Application and Architecture driven Code Transformations - PA3CT
dc.source.conferencedate22/09/2003
dc.source.conferencelocationEdegem Belgium
imec.availabilityPublished - open access


Files in this item

Thumbnail
Name:
7890.pdf
Size:
170.2Kb
Format:
PDF
View/open

This item appears in the following collection(s)

Show simple item record