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Two-layer silicon hybrids interconnect technology

dc.contributor.authorLernout, Jo
dc.contributor.authorVan Calster, Andre
dc.contributor.authorVereeken, Maria
dc.contributor.authorSchols, G.
dc.date.accessioned2021-09-29T13:09:08Z
dc.date.available2021-09-29T13:09:08Z
dc.date.issued1995
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/721
dc.sourceIIOimport
dc.titleTwo-layer silicon hybrids interconnect technology
dc.typeProceedings paper
dc.contributor.imecauthorVan Calster, Andre
dc.source.peerreviewno
dc.source.beginpage375
dc.source.endpage380
dc.source.conferenceProceedings 1995 International Conference on Multichip Modules; April 1995; Denver, Colorado, USA.
dc.source.conferencelocation
imec.availabilityPublished - imec


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