dc.contributor.author | Carchon, Geert | |
dc.contributor.author | Sun, Xiao | |
dc.contributor.author | De Raedt, Walter | |
dc.contributor.author | Beyne, Eric | |
dc.date.accessioned | 2021-10-15T04:06:16Z | |
dc.date.available | 2021-10-15T04:06:16Z | |
dc.date.issued | 2003 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/7285 | |
dc.source | IIOimport | |
dc.title | Wafer level packaging technology for low-loss on-chip transmission lines and inductors | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Sun, Xiao | |
dc.contributor.imecauthor | De Raedt, Walter | |
dc.contributor.imecauthor | Beyne, Eric | |
dc.contributor.orcidimec | De Raedt, Walter::0000-0002-7117-7976 | |
dc.contributor.orcidimec | Beyne, Eric::0000-0002-3096-050X | |
dc.source.peerreview | no | |
dc.source.conference | IMAPS | |
dc.source.conferencedate | 16/11/2003 | |
dc.source.conferencelocation | Boston, MA USA | |
imec.availability | Published - imec | |