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dc.contributor.authorCellere, G.
dc.contributor.authorValentini, M.G.
dc.contributor.authorPantisano, Luigi
dc.contributor.authorCheung, K.P.
dc.contributor.authorPaccagnella, A.
dc.date.accessioned2021-10-15T04:07:23Z
dc.date.available2021-10-15T04:07:23Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7299
dc.sourceIIOimport
dc.titleDifferent nature of process-induced and stress-induced defects in thin SiO2 layers
dc.typeJournal article
dc.source.peerreviewno
dc.source.beginpage393
dc.source.endpage395
dc.source.journalIEEE Electron Device Letters
dc.source.issue6
dc.source.volume24
imec.availabilityPublished - imec


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