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Plasma nitridation optimization sub-15A gate dielectrics

dc.contributor.authorCubaynes, Florence
dc.contributor.authorSchmitz, Jurriaan
dc.contributor.authorvan der marel, C.
dc.contributor.authorSnijders, H.
dc.contributor.authorVeloso, Anabela
dc.contributor.authorRothschild, Aude
dc.contributor.authorOlsen, C.
dc.contributor.authorDate, Lucien
dc.date.accessioned2021-10-15T04:14:01Z
dc.date.available2021-10-15T04:14:01Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7368
dc.sourceIIOimport
dc.titlePlasma nitridation optimization sub-15A gate dielectrics
dc.typeProceedings paper
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorDate, Lucien
dc.source.peerreviewno
dc.source.beginpage595
dc.source.endpage604
dc.source.conferenceSilicon Nitride and Silicon Dioxide Thin Insulating Films VII
dc.source.conferencedate28/04/2003
dc.source.conferencelocationParis France
imec.availabilityPublished - imec


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