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Silicides for sub-40nm gate length CMOS

dc.contributor.authorKittl, Jorge
dc.contributor.authorLauwers, Anne
dc.contributor.authorChamirian, Oxana
dc.contributor.authorVan Dal, Mark
dc.contributor.authorAkheyar, Amal
dc.contributor.authorde Potter de ten Broeck, Muriel
dc.contributor.authorLindsay, Richard
dc.contributor.authorMaex, Karen
dc.date.accessioned2021-10-15T05:10:54Z
dc.date.available2021-10-15T05:10:54Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7739
dc.sourceIIOimport
dc.titleSilicides for sub-40nm gate length CMOS
dc.typeProceedings paper
dc.contributor.imecauthorLauwers, Anne
dc.contributor.imecauthorVan Dal, Mark
dc.contributor.imecauthorde Potter de ten Broeck, Muriel
dc.contributor.imecauthorMaex, Karen
dc.source.peerreviewno
dc.source.beginpage140
dc.source.endpage143
dc.source.conferenceProceedings of the AVS 4th International Conference on Microelectronics and Interfaces - ICMI
dc.source.conferencedate3/03/2003
dc.source.conferencelocationSanta Clara, CA USA
imec.availabilityPublished - imec


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