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Comparison of pattern placement errors as measured using traditional overlay targets and design rule structures

dc.contributor.authorLeray, Philippe
dc.contributor.authorLaidler, David
dc.contributor.authorPollentier, Ivan
dc.date.accessioned2021-10-15T05:22:23Z
dc.date.available2021-10-15T05:22:23Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7797
dc.sourceIIOimport
dc.titleComparison of pattern placement errors as measured using traditional overlay targets and design rule structures
dc.typeProceedings paper
dc.contributor.imecauthorLeray, Philippe
dc.contributor.imecauthorLaidler, David
dc.contributor.imecauthorPollentier, Ivan
dc.contributor.orcidimecLaidler, David::0000-0003-4055-3366
dc.contributor.orcidimecPollentier, Ivan::0000-0002-4266-6500
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage49
dc.source.endpage60
dc.source.conferenceMetrology, Inspection, and Process Control for Microlithography XVII
dc.source.conferencedate23/02/2003
dc.source.conferencelocationSanta Clara, CA USA
imec.availabilityPublished - open access
imec.internalnotesProceedings of SPIE; Vol. 5038


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