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ESD reliability challenges for RF/mixed signal design and processing

dc.contributor.authorMahadeva Iyer, Natarajan
dc.contributor.authorRadhakrishnan, M.K.
dc.date.accessioned2021-10-15T05:32:58Z
dc.date.available2021-10-15T05:32:58Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7848
dc.sourceIIOimport
dc.titleESD reliability challenges for RF/mixed signal design and processing
dc.typeProceedings paper
dc.source.peerreviewno
dc.source.beginpage20
dc.source.endpage21
dc.source.conferenceProceedings 16th Int. Conf. on VLSI Design concurrently with the 21nd Int. Conf. on Embedded Systems Design
dc.source.conferencedate4/01/2003
dc.source.conferencelocationNew Delhi India
imec.availabilityPublished - imec


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