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Causality constraints for processor architectures with sub-word parallelism

dc.contributor.authorSchaffer, Rainer
dc.contributor.authorMerker, Renate
dc.contributor.authorCatthoor, Francky
dc.date.accessioned2021-10-15T06:30:43Z
dc.date.available2021-10-15T06:30:43Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8104
dc.sourceIIOimport
dc.titleCausality constraints for processor architectures with sub-word parallelism
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewno
dc.source.beginpage82
dc.source.endpage89
dc.source.conferenceProceedings Euromicro Symposium on Digital System Design
dc.source.conferencedate1/09/2003
dc.source.conferencelocationAntalya Turkije
imec.availabilityPublished - imec


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