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Analysis of high-Q on-chip inductors realized by wafer level packaging techniques

dc.contributor.authorSun, Xiao
dc.contributor.authorCarchon, Geert
dc.contributor.authorDe Raedt, Walter
dc.contributor.authorBeyne, Eric
dc.date.accessioned2021-10-15T06:53:24Z
dc.date.available2021-10-15T06:53:24Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8195
dc.sourceIIOimport
dc.titleAnalysis of high-Q on-chip inductors realized by wafer level packaging techniques
dc.typeProceedings paper
dc.contributor.imecauthorSun, Xiao
dc.contributor.imecauthorDe Raedt, Walter
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecDe Raedt, Walter::0000-0002-7117-7976
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.source.peerreviewno
dc.source.beginpage1510
dc.source.endpage1515
dc.source.conferenceProceedings of the 53rd Electronic Components and Technology Conference
dc.source.conferencedate27/05/2003
dc.source.conferencelocationNew Orleans, LA USA
imec.availabilityPublished - imec


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