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Snapback circuit model for cascaded NMOS ESD over-voltage protection structures

dc.contributor.authorVassilev, Vesselin
dc.contributor.authorLorenzini, Martino
dc.contributor.authorJansen, Philippe
dc.contributor.authorVashchenko, V.
dc.contributor.authorYang, J.J.
dc.contributor.authorConcannon, A.
dc.contributor.authorArcher, D.
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorMahadeva Iyer, Natarajan
dc.contributor.authorTerbeek, M.
dc.contributor.authorThijs, Steven
dc.contributor.authorChoi, B.J.
dc.contributor.authorSteyaert, M.
dc.contributor.authorMaes, Herman
dc.date.accessioned2021-10-15T07:34:32Z
dc.date.available2021-10-15T07:34:32Z
dc.date.issued2003-09
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8350
dc.sourceIIOimport
dc.titleSnapback circuit model for cascaded NMOS ESD over-voltage protection structures
dc.typeProceedings paper
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.imecauthorThijs, Steven
dc.contributor.orcidimecThijs, Steven::0000-0003-2889-8345
dc.source.peerreviewyes
dc.source.beginpage561
dc.source.endpage564
dc.source.conference33rd European Solid-State Devices Research Conference - ESSDERC
dc.source.conferencedate15/09/2003
dc.source.conferencelocationEstoril Portugal
imec.availabilityPublished - imec


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