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Timing optimization by bit-level arithmetic transformations

dc.contributor.authorRynders, Luc
dc.contributor.authorSahraoui, Z.
dc.contributor.authorSix, Paul
dc.contributor.authorDe Man, Hugo
dc.date.accessioned2021-09-29T13:15:53Z
dc.date.available2021-09-29T13:15:53Z
dc.date.issued1995
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/836
dc.sourceIIOimport
dc.titleTiming optimization by bit-level arithmetic transformations
dc.typeProceedings paper
dc.contributor.imecauthorRynders, Luc
dc.contributor.imecauthorDe Man, Hugo
dc.source.peerreviewno
dc.source.beginpage48
dc.source.endpage53
dc.source.conferenceProceedings EURO-DAC 95. European Design Automation Conference with EuroVHDL
dc.source.conferencedate18/09/1995
dc.source.conferencelocationBrighton UK
imec.availabilityPublished - imec


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