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Modular construction and power modeling of dynamic memory managers for embedded systems

dc.contributor.authorAtienza, David
dc.contributor.authorMamagkakis, Stylianos
dc.contributor.authorCatthoor, Francky
dc.contributor.authorMendias Cuadros, J.
dc.contributor.authorSoudris, D.
dc.date.accessioned2021-10-15T12:39:24Z
dc.date.available2021-10-15T12:39:24Z
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8496
dc.sourceIIOimport
dc.titleModular construction and power modeling of dynamic memory managers for embedded systems
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewno
dc.source.beginpage510
dc.source.endpage520
dc.source.conferenceIntegrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - PATMOS
dc.source.conferencedate15/09/2004
dc.source.conferencelocationSantorini Greece
imec.availabilityPublished - imec
imec.internalnotesLecture Notes in Computer Science; Vol. 3254


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