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Extending on-die wiring hierarchy with wafer-level packaging concepts

dc.contributor.authorBalachandran, Jayaprakash
dc.contributor.authorBrebels, Steven
dc.contributor.authorCarchon, Geert
dc.contributor.authorWebers, Tomas
dc.contributor.authorDe Raedt, Walter
dc.contributor.authorNauwelaers, Bart
dc.contributor.authorBeyne, Eric
dc.date.accessioned2021-10-15T12:40:38Z
dc.date.available2021-10-15T12:40:38Z
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8529
dc.sourceIIOimport
dc.titleExtending on-die wiring hierarchy with wafer-level packaging concepts
dc.typeProceedings paper
dc.contributor.imecauthorBrebels, Steven
dc.contributor.imecauthorWebers, Tomas
dc.contributor.imecauthorDe Raedt, Walter
dc.contributor.imecauthorNauwelaers, Bart
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecBrebels, Steven::0000-0002-1568-0286
dc.contributor.orcidimecDe Raedt, Walter::0000-0002-7117-7976
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.source.peerreviewno
dc.source.beginpage105
dc.source.endpage107
dc.source.conferenceIEEE International Interconnect Technology Conference
dc.source.conferencedate7/06/2004
dc.source.conferencelocationSan Francisco, CA USA
imec.availabilityPublished - imec


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