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Strained Si on strain-relaxed SiGe buffer layers: the selective route towards integration

dc.contributor.authorCaymax, Matty
dc.contributor.authorDelhougne, Romain
dc.contributor.authorLoo, Roger
dc.contributor.authorEneman, Geert
dc.contributor.authorVerheyen, Peter
dc.date.accessioned2021-10-15T12:50:17Z
dc.date.available2021-10-15T12:50:17Z
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8664
dc.sourceIIOimport
dc.titleStrained Si on strain-relaxed SiGe buffer layers: the selective route towards integration
dc.typeProceedings paper
dc.contributor.imecauthorCaymax, Matty
dc.contributor.imecauthorDelhougne, Romain
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorVerheyen, Peter
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.source.peerreviewno
dc.source.conferenceSEMI Technology Symposium (STS) SEMICON Europe
dc.source.conferencedate20/05/2004
dc.source.conferencelocationMunich Germany
imec.availabilityPublished - imec
imec.internalnotesinvited paper presented at the SiGe/SOI/Strained Si: from growth to device properties session


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