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A 14 bit 130 MHz CMOS current-steering DAC with adjustable INL

dc.contributor.authorChen, Tao
dc.contributor.authorGeens, Peter
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorDehaene, Wim
dc.contributor.authorGielen, Georges
dc.date.accessioned2021-10-15T12:51:19Z
dc.date.available2021-10-15T12:51:19Z
dc.date.issued2004-09
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8674
dc.sourceIIOimport
dc.titleA 14 bit 130 MHz CMOS current-steering DAC with adjustable INL
dc.typeProceedings paper
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorDehaene, Wim
dc.contributor.imecauthorGielen, Georges
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage167
dc.source.endpage170
dc.source.conferenceProceedings of the 30th European Solid-State Circuits Conference - ESSCIRC
dc.source.conferencedate21/09/2004
dc.source.conferencelocationLeuven Belgium
imec.availabilityPublished - open access


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