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Traffic pattern analysis for reconfigurable interconnects in shared-memory systems

dc.contributor.authorHeirman, W.
dc.contributor.authorDambre, Joni
dc.contributor.authorDebaes, C.
dc.contributor.authorVan Campenhout, Jan
dc.contributor.authorThienpont, H.
dc.date.accessioned2021-10-15T13:45:10Z
dc.date.available2021-10-15T13:45:10Z
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/9010
dc.sourceIIOimport
dc.titleTraffic pattern analysis for reconfigurable interconnects in shared-memory systems
dc.typeProceedings paper
dc.contributor.imecauthorDambre, Joni
dc.source.peerreviewno
dc.source.conferenceProceedings Program for Research on Integrated Systems and Circuits, ProRISC
dc.source.conferencedate25/11/2004
dc.source.conferencelocationVeldhoven The Netherlands
imec.availabilityPublished - imec


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