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Fabrication of 50nm high performance strained-SiGe pMOSFETs with selective epitaxial growth

dc.contributor.authorLoo, Roger
dc.contributor.authorCollaert, Nadine
dc.contributor.authorVerheyen, Peter
dc.contributor.authorCaymax, Matty
dc.contributor.authorDelhougne, Romain
dc.contributor.authorDe Meyer, Kristin
dc.date.accessioned2021-10-15T14:32:50Z
dc.date.available2021-10-15T14:32:50Z
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/9221
dc.sourceIIOimport
dc.titleFabrication of 50nm high performance strained-SiGe pMOSFETs with selective epitaxial growth
dc.typeJournal article
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorVerheyen, Peter
dc.contributor.imecauthorCaymax, Matty
dc.contributor.imecauthorDelhougne, Romain
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.source.peerreviewno
dc.source.beginpage292
dc.source.endpage296
dc.source.journalApplied Surface Science
dc.source.issue1_4
dc.source.volume224
imec.availabilityPublished - imec


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