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dc.contributor.authorMahadeva Iyer, Natarajan
dc.contributor.authorVassilev, Vesselin
dc.contributor.authorThijs, Steven
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-15T14:40:57Z
dc.date.available2021-10-15T14:40:57Z
dc.date.issued2004-12
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/9254
dc.sourceIIOimport
dc.titleModeling and simulation for ESD protection circuit design and optimization
dc.typeProceedings paper
dc.contributor.imecauthorThijs, Steven
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecThijs, Steven::0000-0003-2889-8345
dc.source.peerreviewno
dc.source.beginpageA12
dc.source.endpageA18
dc.source.conferenceProceedings International Conference on Semiconductor Electronics - ICSE
dc.source.conferencedate6/12/2004
dc.source.conferencelocationKuala Lumpur Malaysia
imec.availabilityPublished - imec


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