Custom design of multi-level dynamic memory management subsystem for embedded systems
dc.contributor.author | Mamagkakis, Stylianos | |
dc.contributor.author | Atienza, David | |
dc.contributor.author | Poucet, Christophe | |
dc.contributor.author | Catthoor, Francky | |
dc.contributor.author | Soudris, Dimitrios | |
dc.contributor.author | Mendias, J.M. | |
dc.date.accessioned | 2021-10-15T14:42:38Z | |
dc.date.available | 2021-10-15T14:42:38Z | |
dc.date.issued | 2004 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/9261 | |
dc.source | IIOimport | |
dc.title | Custom design of multi-level dynamic memory management subsystem for embedded systems | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Catthoor, Francky | |
dc.contributor.orcidimec | Catthoor, Francky::0000-0002-3599-8515 | |
dc.source.peerreview | no | |
dc.source.beginpage | 170 | |
dc.source.endpage | 175 | |
dc.source.conference | IEEE Workshop on Signal Processing Systems - SIPS | |
dc.source.conferencedate | 13/10/2004 | |
dc.source.conferencelocation | Austin, TX USA | |
imec.availability | Published - imec |
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