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Hardware building blocks of a mixed granularity reconfigurable system-on-chip platform

dc.contributor.authorMasselos, Kostas
dc.contributor.authorBlionas, S.
dc.contributor.authorMignolet, Jean-Yves
dc.contributor.authorFoster, Alun
dc.contributor.authorSoudris, Dimitris
dc.contributor.authorNikolaidis, Spyros
dc.date.accessioned2021-10-15T14:47:26Z
dc.date.available2021-10-15T14:47:26Z
dc.date.issued2004-09
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/9280
dc.sourceIIOimport
dc.titleHardware building blocks of a mixed granularity reconfigurable system-on-chip platform
dc.typeProceedings paper
dc.source.peerreviewno
dc.source.beginpage613
dc.source.endpage622
dc.source.conferenceIntegrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation, 14th Int. Workshop PATMOS
dc.source.conferencedate15/09/2004
dc.source.conferencelocationSantorini Greece
imec.availabilityPublished - imec
imec.internalnotesLecture Notes in Computer Science; Vol. 3254


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