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Enhanced ESD protection robustness of a lateral NPN structure in the advanced CMOS

dc.contributor.authorVassilev, Vesselin
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorSteyaert, Michiel
dc.contributor.authorMaes, Herman
dc.date.accessioned2021-10-15T17:30:02Z
dc.date.available2021-10-15T17:30:02Z
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/9841
dc.sourceIIOimport
dc.titleEnhanced ESD protection robustness of a lateral NPN structure in the advanced CMOS
dc.typeProceedings paper
dc.contributor.imecauthorGroeseneken, Guido
dc.source.peerreviewno
dc.source.beginpage605
dc.source.endpage606
dc.source.conferenceProceedings IEEE International Reliability Physics Symposium - IRPS
dc.source.conferencedate25/04/2004
dc.source.conferencelocationPhoenix, AZ USA
imec.availabilityPublished - imec


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