Browsing by Author "Bayoumi, Magdy"
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Publication A Novel Design Reversible logic based Configurable Fault-Tolerant Embryonic Hardware
Proceedings paper2020, IEEE International Symposium on Circuits and Systems (ISCAS), OCT 10-21, 2020Publication A Reversible-Logic based Architecture for Convolutional Neural Network (CNN)
Proceedings paper2021, IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), AUG 09-11, 2021, p.1070-1073Publication A Reversible-Logic based Architecture for Long Short-Term Memory (LSTM) Network
Proceedings paper2021, IEEE International Symposium on Circuits and Systems (IEEE ISCAS), MAY 22-28, 2021Publication A Reversible-Logic based Architecture for VGGNet
Proceedings paper2021, 28th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), NOV 28-DEC 01, 2021Publication Adaptive Hardware Architecture for Neural-Network-on-Chip
Proceedings paper2022, IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS), AUG 07-10, 2022Publication An Efficient Embryonic Hardware Architecture based on Network-on-Chip
Proceedings paper2021, IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), AUG 09-11, 2021, p.449-452Publication An Efficient Reconfigurable Neural Network on Chip
Proceedings paper2021, 28th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), NOV 28-DEC 01, 2021Publication Editorial Special Issue on Rapid Prototyping of DSP Systems
Journal article2003, EURASIP Journal on Applied Signal Processing, 6, p.491-493Publication Neuro-NoC: Energy Optimization in Heterogeneous Many-Core NoC using Neural Networks in Dark Silicon Era
;Reza, M. F. ;Le, T. T. ;Dey, Bappaditya ;Bayoumi, MagdyZhao, D.Proceedings paper2018, IEEE International Symposium on Circuits and Systems (ISCAS), MAY 27-30, 2018