Browsing by Author "Chauhan, Y."
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Publication A new charge based compact model for lateral asymmetric MOSFET and its application to high voltage MOSFET modeling
Proceedings paper2007-01, 20th International Conference on VLSI Design, 6/01/2007, p.177-182Publication Compact modeling of lateral nonuniform doping in high-voltage MOSFETs
Journal article2007, IEEE Trans. Electron Devices, (54) 6, p.1527-1539Publication Consideration of UFET architecture for the 5nm node and beyond logic transistor
Journal article2018, IEEE Journal of the Electron Devices Society, 6, p.1129-1135Publication Consideration of UFET architecture for the 5nm node and beyond logic transistor
Proceedings paper2018, Silicon Nanoelectronics Workshop, 17/06/2018, p.1