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Browsing by Author "Gaillardon, Pierre-Emmanuel"

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    3D Nanofabric: Layout Challenges and Solutions for Ultra-scaled Logic Designs

    Giacomin, Edouard
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    Boemmels, Juergen  
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    Ryckaert, Julien  
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    Catthoor, Francky  
    Proceedings paper
    2021, 28th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), OCT 06-09, 2020, p.279-300
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    A Multiply-and-Accumulate Array for Machine Learning Applications Based on a 3D Nanofabric Flow

    Giacomin, Edouard
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    Gudaparthi, Sumanth
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    Boemmels, Juergen  
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    Balasubramonian, Rajeev
    Journal article
    2021, IEEE TRANSACTIONS ON NANOTECHNOLOGY, 20, p.873-882
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    Area-Efficient Multiplier Designs Using a 3D Nanofabric Process Flow

    Giacomin, Edouard
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    Catthoor, Francky  
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    Gaillardon, Pierre-Emmanuel
    Proceedings paper
    2021, IEEE International Symposium on Circuits and Systems (IEEE ISCAS), MAY 22-28, 2021
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    Design and benchmarking of hybrid CMOS-spin wave device circuits compared to 10nm CMOS

    Zografos, Odysseas  
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    Soree, Bart  
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    Vaysset, Adrien
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    Cosemans, Stefan  
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    Amaru, Luca
    Proceedings paper
    2015, IEEE 15th International Conference on Nanotechnology - IEEE-NANO, 27/07/2015
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    Devices and circuits using novel 2-D materials: a perspective for future VLSI systems

    Resta, Giovanni V.
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    Leonhardt, Alessandra  
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    Balaji, Yashwanth  
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    De Gendt, Stefan  
    Journal article
    2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, (27) 7, p.1486-1503
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    Doping-free complementary inverter enabled by 2D WSe2 electrostatically-doped reconfigurable transistors

    Resta, Giovanni
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    Balaji, Yashwanth  
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    Lin, Dennis  
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    Radu, Iuliana  
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    Catthoor, Francky  
    Proceedings paper
    2018, 76th Device Research Conference - DRC, 24/06/2018
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    Doping-free complementary logic gates enabled by two-dimensional polarity-controllable transistors

    Resta, Giovanni
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    Balaji, Yashwanth  
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    Lin, Dennis  
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    Radu, Iuliana  
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    Catthoor, Francky  
    Journal article
    2018, ACS Nano, (12) 7, p.7039-7047
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    Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow

    Giacomin, Edouard
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    Boemmels, Juergen  
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    Ryckaert, Julien  
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    Catthoor, Francky  
    Proceedings paper
    2020, IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC), OCT 05-09, 2020, p.34-39
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    Majority logic synthesis for spin wave technology

    Zografos, Odysseas  
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    Amaru, Luca
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    Gaillardon, Pierre-Emmanuel
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    Raghavan, Praveen
    Proceedings paper
    2014, 17th Euromicro Conference on Digital System Design - DSD, 27/08/2014, p.691-694
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    Polarity control in WSe2 double-gate transistors

    Resta, Giovanni
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    Sutar, Surajit  
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    Balaji, Yashwanth  
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    Lin, Dennis  
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    Raghavan, Praveen
    Journal article
    2016, Scientific Reports, 6, p.29448
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    Scaling trends and performance evaluation of 2-dimensional polarity-controllable FETs

    Resta, Giovanni
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    Agarwal Kumar, Tarun
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    Lin, Dennis  
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    Radu, Iuliana  
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    Catthoor, Francky  
    Journal article
    2017, Scientific Reports, 7, p.45556
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    Towards high-performance polarity-controllable FETs with 2D materials

    Resta, Giovanni
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    Gonzalez, Jorge Romero
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    Balaji, Yashwanth  
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    Agarwal Kumar, Tarun
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    Lin, Dennis  
    Proceedings paper
    2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 19/03/2018, p.637-641
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    Wave pipelining for majority-based beyond-CMOS technologies

    Zografos, Odysseas  
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    De Meester, Anton
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    Testa, Eleonora  
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    Soeken, Mathias
    Proceedings paper
    2017, Design, Automation and Test in Europe Conference and Exhibition - DATE, 27/03/2017, p.1306-1311

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