Browsing by Author "Gerousis, V."
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Publication Impact of a SADP flow on the design and process for N10/N7 layers
Proceedings paper2015, Design-Process-Technology Co-optimization for Manufacturability IX, 7/02/2015, p.942709Publication Low track height standard cell design in iN7 using scaling boosters
Proceedings paper2017, Design-Process-Technology Co-optimization for Manufacturability XI, 26/02/2017, p.101480YPublication Metal stack optimization for low-power and high-density for N7-N5
Proceedings paper2016, Design-Process-Technology Co-optimization for Manufacturability X, 24/02/2016, p.97810QPublication Track height reduction for standard-cell in below 5nm node: How low can you go?
Meeting abstract2018, Design-Process-Technology Co-optimization for Manufacturability XII, 25/02/2018, p.1058809