Browsing by Author "Giannini, Vito"
- Results Per Page
- Sort Options
Publication A 0.1-5GHz dual-VCO software-defined sigma delta frequency synthesizer in 45nm digital CMOS
Proceedings paper2009, IEEE Radio Frequency Integrated Circuits Symposium - RFIC, 7/06/2009, p.321-324Publication A 2mm2 0.1-5GHz SDR receiver in 45nm digital CMOS
Proceedings paper2009, IEEE International Solid-State Circuits Conference - ISSCC, 8/02/2009, p.408-409Publication A 2mm2 0.1-5GHz software defined radio receiver in 45nm digital CMOS
Journal article2009, IEEE Journal of Solid-State Circuits, (44) 12, p.3486-3498Publication A 4-antenna-path beamforming transceiver for 60GHz multi-Gb/s communication in 28nm CMOS
Proceedings paper2016, IEEE International Solid-State Circuits Conference - ISSCC, 31/01/2016, p.246-247Publication A 40nm CMOS 0.4-6 GHz receiver resilient to out-of-band blockers
Journal article2011, IEEE Journal of Solid-State Circuits, (46) 6, p.1659-1671Publication A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers
Proceedings paper2011, IEEE International Solid-State Circuits Conference - ISSCC, 20/02/2011, p.62Publication A 550mV 8dBm IIP3 4th order analog base band filter for WLAN receivers
;De Matteis, Marcello ;D'amico, Stefano ;Giannini, VitoBaschirotto, AndreaProceedings paper2007, Proceedings of the 33rd European Solid-State Circuits Conference - ESSCIRC, 11/09/2007, p.504-507Publication A 5mm2 40nm LP CMOS 0.1-to-3GHz multistandard transceiver
Proceedings paper2010, IEEE International Solid-State Circuits Conference - ISSCC, 7/02/2010, p.458-459Publication A 5mm2 40nm LP CMOS 0.1-to-6GHz multistandard transceiver
Proceedings paper2010-06, SDR Forum European Reconfigurable Radio Technologies Workshop and Product Exposition, 23/06/2010Publication A 5mm2 40nm LP CMOS transceiver for a software-defined radio platform
Journal article2010, IEEE Journal of Solid-State Circuits, (45) 12, p.2794-2806Publication A 5th subharmonic, inverter-based injection locked oscillator with 72-83GHz locking range
Proceedings paper2014, IEEE Radio Frequency Integrated Circuits Symposium - RFIC, 1/06/2014, p.185-188Publication A 79 GHz binary phase-modulated continuous-wave radar transceiver with TX-to-RX spillover cancellation in 28nm CMOS
Proceedings paper2015, IEEE international Solid-State Circuits Conference - ISSCC, 22/02/2015, p.354-355Publication A 79GHz phase-modulated 4GHz BW CW radar transmitter in 28nm CMOS
Journal article2014, IEEE Journal of Solid-State Circuits, (49) 12, p.2925-2937Publication A 79GHz phase-modulated 4GHz BW CW radar TX in 28nm CMOS
Proceedings paper2014, IEEE International Solid-State Circuits Conference - ISSCC, 9/02/2014, p.250-251Publication A 79GHz variable gain low-noise amplifier and power amplifier in 28nm CMOS operating up to 125°C
Proceedings paper2014, 40th European Solid State Circuits Conference - ESSCIRC, 22/09/2014, p.183-186Publication A 86MHz-12GHz Digital-Intensive PLL for software-defined radios, using a 6fJ/step TDC in 40nm digital CMOS
Journal article2010, IEEE Journal of Solid-State Circuits, (45) 10, p.2116-2129Publication A 86MHz-12GHz digital-intensive, phase-modulated fractional-N PLL, using a 15pJ/shot 5ps TDC in 40nm digital CMOS
Proceedings paper2010, IEEE International Solid-State Circuits Conference - ISSCC, 7/02/2010, p.480-481Publication A CMOS 100 MHz to 6 GHz software defined radio analog front-end with integrated pre-power amplifier
Proceedings paper2007-09, Proceedings of the 33rd European Solid-State Circuits Conference - ESSCIRC, 11/09/2007, p.436-439Publication A fifth-order 880MHz/1.76GHz active lowpass filter for 60GHz communication in 40nm digital CMOS
Proceedings paper2010, 36th European Solid-State Circuits Conference - ESSCIRC, 14/09/2010, p.350-353Publication A fully reconfigurable software-defined radio transceiver in 0.13μm CMOS
Proceedings paper2007-02, International Solid-State Circuits Conference - ISSCC, 11/02/2007, p.346-347
- «
- 1 (current)
- 2
- 3
- »