Browsing by Author "Hasegawa, Keiichi"
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Publication CDM ESD testing of a 3D TSV stacked IC chip
Meeting abstract2014-10, 5th IEEE International 3D-TEST Workshop, 23/10/2014, p.1-4Publication CDM protection of a 3D TSV memory IC with a 100 GB/s Wide I/O data bus
Proceedings paper2014-09, EOS/ESD Symposium Proceedings, 7/09/2014, p.61-67