Browsing by Author "Hayakawa, Susumu"
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Publication Demonstration of integrating post-thinning clean and TSV exposure recess etch into a wafer backside thinning process
Proceedings paper2012, 4th Electronics System Integration Technology Conference - ESTC, 17/09/2012Publication Demonstration of ultra-thin Si grinding process controlled by in-situ non-contact gauge for 3D stacked IC (3D-SIC)
Proceedings paper2010, 7th Annual International Wafer-Level Packaging Conference, 11/10/2010, p.49-54Publication Wafer backside thinning process integrated with post-thinning clean and TSV exposure recess etch
Proceedings paper2012, China Semiconductor Technology International Conference - CSTIC, 18/03/2012, p.865-870